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Results 1 to 25 of 12721

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MOS AND BIPOLAR ICS IN CONSUMER APPLICATIONS.PENNEY JD.1974; MICROELECTRON. AND RELIABIL.; G.B.; DA. 1974; VOL. 13; NO 5; PP. 379-386; (SEMINEX SEMIN., LONDON; 1974)Conference Paper

REVERSE CMOS PROCESSINGMADDOX RL.1981; SOLID STATE TECHNOL.; ISSN 0038-111X; USA; DA. 1981; VOL. 24; NO 2; PP. 128-140; 5 P.; BIBL. 15 REF.Article

NEW CMOS TECHNOLOGIESHOEFFLINGER B; ZIMMER G.1980; CONF. SER.-INST. PHYS.; ISSN 0305-2346; GBR; DA. 1980 PUBL. 1981; NO 57; PP. 85-139; BIBL. 2 P.Conference Paper

LIMITATIONS ON THE MAXIMUM OPERATING VOLTAGE OF CMOS INTEGRATED CIRCUITS.DISHMAN JM.1975; IN: INT. ELECTRON DEVICES MEET.; WASHINGTON, D.C.; 1975; NEW YORK; INST. ELECTR. ELECTRON. ENG.; DA. 1975; PP. 551-554; BIBL. 6 REF.Conference Paper

MOS DEVICE AND TECHNOLOGY CONSTRAINTS IN VLSIYOUSSEF EL MANSY.1982; IEEE TRANS. ELECTRON DEVICES; ISSN 0018-9383; USA; DA. 1982; VOL. 29; NO 4; PP. 567-573; BIBL. 26 REF.Article

MIKROCOMPUTER-FAMILIE TMS-1000 = LA FAMILLE DE MICRO-ORDINATEURS TMS-1000GOESSLER R.1980; ELEKTRONIK (MUENCH.); ISSN 0013-5658; DEU; DA. 1980; VOL. 29; NO 20; PP. 103-104Article

PROPERTIES OF ESFI MOS TRANSISTORS DUE TO THE FLOATING SUBSTRATE AND THE FINITE VOLUME. = LES TRANSISTORS MOS AVEC DES COUCHES DE SILICIUM EPITAXIAL SUR L'ISOLANT: PROPRIETES DUES AU SUBSTRAT FLOTTANT ET AU VOLUME FINITIHANYI J; SCHLOTTERER H.1975; I.E.E.E. TRANS. ELECTRON. DEVICES; U.S.A.; DA. 1975; VOL. 22; NO 11; PP. 1017-1023; BIBL. 11 REF.Article

RECENT DEVELOPMENTS IN CMOS/SOS.KAISER HW; GEHWEILER WF; STOTZ WJ et al.1973; ELECTRON. PACKAG. PRODUCT.; U.S.A.; DA. 1973; VOL. 13; NO 9; PP. 38-46 (6P.)Article

A 6K-GATE CMOS GATE ARRAYTAGO H; KOBAYASHI T; KOBAYASHI M et al.1982; IEEE JOURNAL OF SOLID-STATE CIRCUITS; ISSN 0018-9200; USA; DA. 1982; VOL. 17; NO 5; PP. 907-912; BIBL. 7 REF.Article

LOCMOS LENDS ITSELF TO FULL SCALE INTEGRATION.BEER A.1977; NEW ELECTRON; G.B.; DA. 1977; VOL. 10; NO 3; PP. 28-32 (3P.)Article

DIE PRUEFUNG VON CMOS-BAUELEMENTEN UND- SCHALTUNGEN.HERRMAN G.1975; ELEKTRONIK; DTSCH.; DA. 1975; VOL. 24; NO 9; PP. 103-106; BIBL. 1 REF.Article

GATE-ARRAY-TECHNOLOGIE FUER HOECHSTINTEGRATION = LA TECHNOLOGIE DES RESEAUX DE PORTES POUR L'INTEGRATION A TRES GRANDE ECHELLEROHDE W.1981; RADIO FERNS. ELEKTRON.; ISSN 0033-7900; DDR; DA. 1981; NO 12; PP. 762-763; BIBL. 1 REF.Article

SCHNELLE STATISCHE RAM-BAUSTEINE = COMPOSANTS RAM STATIQUES RAPIDESCAPECE RP.1979; ELEKTRONIK; DEU; DA. 1979; VOL. 28; NO 20; PP. 39-50; BIBL. 3 REF.Article

C2L: A NEW HIGH-SPEED HIGH-DENSITY BULK CMOS TECHNOLOGY.DINGWALL AGF; STRICKER RE.1977; I.E.E.E. J. SOLID-STATE CIRCUITS; U.S.A.; DA. 1977; VOL. 12; NO 4; PP. 344-349; BIBL. 8 REF.Article

Advanced DMOS memory cell using a new isolation structureTERADA, K; ISHIJIMA, T; SUZUKI, S et al.I.E.E.E. transactions on electron devices. 1984, Vol 31, Num 9, pp 1308-1313, issn 0018-9383Article

MICROCIRCUITS: GROWTH OF A SHRINKING INDUSTRY. II. IMPROVING METAL OXIDE CIRCUITSFORTE S.1973; ELECTRONIQUE; SUISSE; DA. 1973; VOL. 2; NO 1; PP. 73-74Serial Issue

A MASTER SLICE DESIGN CONCEPT BASED ON MASTER CELLS IN ESFI-SOS-CMOS TECHNOLOGY.GONAUSER E; HERBST H.1976; SIEMENS FORSCH.-U. ENTWICKL.-BER.; DTSCH.; DA. 1976; VOL. 5; NO 6; PP. 344-349; ABS. ALLEM.; BIBL. 10 REF.Article

DIGITAL INTEGRATED CIRCUITS WITH LOW DISSIPATION.DE TROYE NC.1975; PHILIPS TECH. REV.; NETHERL.; DA. 1975; VOL. 35; NO 7-8; PP. 212-220; BIBL. 18 REF.Article

MOS-FESTWERTSPEICHER = MEMOIRES FIXES MOSVATJEVA D.1979; NACHR.-TECH., ELEKTRON.; DDR; DA. 1979; VOL. 29; NO 5; PP. 204-206; ABS. RUS/ENG/FREArticle

MOS PROCESSES1978; I.E.E.E. TRANS. CONSUMER ELECTRON.; USA; DA. 1978; VOL. 24; NO 2; PP. 155-167Article

CMOS Schmitt trigger with wide hysteresisDOKIC, B. L.Microelectronics. 1984, Vol 15, Num 2, pp 24-29, issn 0026-2692Article

AL2O3 AS A RADIATION-TOLERANT CMOS DIELECTRIC.SCHLESIER KM; SHAW JM; BENYON CW JR et al.1976; R.C.A. REV.; U.S.A.; DA. 1976; VOL. 37; NO 3; PP. 358-388; BIBL. 24 REF.Article

THE METAL OXIDE SEMICONDUCTOR INTEGRATED CIRCUIT TECHNOLOGYGRANNEMANN WW; SOUTHWARD HD; ERTEZA A et al.1972; J. SCI. INDUSTR. RES.; INDIA; DA. 1972; VOL. 31; NO 6; PP. 299-311; BIBL. 24 REF.Serial Issue

VERY-LOW-COST RAM WAVEFORM GENERATORMARGARIS N; LAOURDAS C; NIKOLAIDIS M et al.1980; I.E.E.E. TRANS. INDUSTR. ELECTRON. CONTROL INSTRUMENT.; USA; DA. 1980; VOL. 27; NO 1; PP. 39-41; BIBL. 11 REF.Article

A THEORETICAL AND EXPERIMENTAL STUDY OF DMOS ENHANCEMENT/DEPLETION LOGIC. = ETUDE THEORIQUE ET EXPERIMENTALE DE LA LOGIQUE MOS A DOUBLE DIFFUSION UTILISANT DES TRANSISTORS A ENRICHISSEMENT ET A DEPLETIONDECLERCQ MJ; LAURENT T.1977; I.E.E.E.J. SOLID-STATE CIRCUITS; U.S.A.; DA. 1977; VOL. 12; NO 3; PP. 264-270; BIBL. 17 REF.Article

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